EP1810GC35 データシート Altera

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EP1810GC35 の詳細情報

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  • メーカー情報
型番EP1810GC35
メーカーALTERA
データシートProduct_list_pdf
Additional Feature MACROCELLS INTERCONNECTED BY GLOBAL AND/OR LOCAL BUS; 48 MACROCELLS; 4 EXTERNAL CLOCKS
Clock Frequency-Max 28.6 MHz
In-System Programmable NO
JESD-30 Code S-CPGA-P68
JESD-609 Code e0
JTAG BST NO
Moisture Sensitivity Level 1
Number of Dedicated Inputs 12
Number of I/O Lines 48
Number of Macro Cells 48
Number of Terminals 68
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Organization 12 DEDICATED INPUTS, 48 I/O
Output Function MACROCELL
Package Body Material CERAMIC, METAL-SEALED COFIRED
Package Code PGA
Package Equivalence Code PGA68,11X11
Package Shape SQUARE
Package Style GRID ARRAY Meter
Peak Reflow Temperature (Cel) 220
Power Supplies 5 V
Programmable Logic Type UV PLD
Propagation Delay 40 ns
Qualification Status Not Qualified
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.25 V
Supply Voltage-Min 4.75 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form PIN/PEG
Terminal Pitch 2.54 mm
Terminal Position PERPENDICULAR
会社名称アルテラ
設立1983
所在地101 Innovation Drive San Jose, CA 95134 United States
URLhttp://www.altera.com/

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