ADSP2105KP55 データシート Ad02

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ADSP2105KP55
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ADSP2105KP55 の詳細情報

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  • メーカー情報
型番ADSP2105KP55
メーカーAD
データシートProduct_list_pdf
Additional Feature 20 MIPS; SINGLE CYCLE INSTRUCTION EXECUTION
Address Bus Width 14
Barrel Shifter YES
Bit Size 16
Boundary Scan NO
Clock Frequency-Max 13.824 MHz
External Data Bus Width 24
Format FIXED POINT
Integrated Cache NO
Internal Bus Architecture MULTIPLE
JESD-30 Code S-PQCC-J68
JESD-609 Code e0
Length 24.18 mm
Low Power Mode YES
Number of DMA Channels 0
Number of External Interrupts 1
Number of Serial I/Os 1
Number of Terminals 68
Number of Timers 1
On Chip Data RAM Width 16
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC68,1.0SQ
Package Shape SQUARE
Package Style CHIP CARRIER Meter
Peak Reflow Temperature (Cel) 220
Power Supplies 5 V
Qualification Status Not Qualified
RAM (words) 512
Seated Height-Max 4.45 mm
Sub Category Digital Signal Processors
Supply Current-Max 24 mA
Supply Voltage-Max 5.5 V
Supply Voltage-Min 4.5 V
Supply Voltage-Nom 5 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 24.18 mm
uPs/uCs/Peripheral ICs Type DIGITAL SIGNAL PROCESSOR, OTHER
会社名称アナログ・デバイセズ
設立1965
所在地One Technology Way P. O. Box 9106 Norwood, MA 02062-9106 United States
URLhttp://www.analog.com/

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